Check with seller [Quận 3/HCM] Design & Verification Engineer 2 Slots_20~30M Gross
- Location: Hồ Chí Minh, Viet Nam
Mô tả công việc The work on customer-specific specifications is set to INPUT and the specific design verification work is performed and OUTPUT is performed in the following languages. Function specifications (English) - RTL (Verilog) - Implementation specifications (English) - Verification strategy book (English) - Table of verification entries (English) Build verification environment (SystemVerilog / SVA / UVM / C / C ++) Script verification (SystemVerilog / SVA / UVM / C / C ++) Manual verification environment (English) - Verification results report (in English) The above can be performed without the assistance of other engineers to some extent ■Working condition Mon-Fri: 08:00 ~ 17:00 ■Salary: 20,000,000VND~30,000,000VND (Gross) Quyền lợi được hưởng - Working with Japanese experts can help you improve your ability to work - Salary for 13th month - International, challenging, and friendly working environment - Full of social welfare under Vietnamese Labor Law (Insurance, annual leave, ...) - 12 annual leave days and 3 paid summer holidays - Annual travel and team building activities - Training: Trained in soft and technical skills Yêu cầu kỹ năng - Over 32 years old - Have strong experience as leader role in some project * English skill: Intermediate English skills + Communication: Intermediate +Reading: Intermediate - Can read and understand most sentences but slowly + Writing: Intermediate - Can write paragraphs in simple but slow sentences. Must - More than 5++ years of experience working in the semiconductor industry - Knowledge and skills: Prioritize design skills, Verilog Intermediate English skills Better - SystemVerilog, SVA, UVM Methodology, C, SystemC, etc.
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